DFI G5C630-DR Manuel d'utilisateur télécharger pdf (Page 68)

BIOS Setup

Advanced Chipset Features

This section gives you functions to configure the system based on

the specific features of the chipset. The chipset manages bus speeds

and access to system memory resources. These items should not

be altered unless necessary. The default settings have been chosen

because they provide the best operating conditions for your system.

The only time you might consider making any changes would be if

you discovered some incompatibility or that data was being lost

while using your system.

DRAM Timing Selectable

This field is used to select the timing of the DRAM.

By SPD The EEPROM on a DIMM has SPD (Serial Pres-

ence Detect) data structure that stores informa-

tion about the module such as the memory type,

memory size, memory speed, etc. When this op-

tion is selected, the system will run according to

the information in the EEPROM. This option is the

default setting because it provides the most sta-

ble condition for the system. The “CAS Latency

Time” to “Precharge Delay” fields will show the

default settings by SPD.

Phoenix - AwardBIOS CMOS Setup Utility

Advanced Chipset Features

DRAM Timing Selectable

CAS Latency Time

DRAM RAS# to CAS# Delay

DRAM RAS# Precharge

Precharge Delay <tRAS>

System BIOS Cacheable

Video BIOS Cacheable

Memory Hole At 15M-16M

X PCI Express Boot Port Func

** VGA Setting **

PEG/Onchip VGA Control

PEG Force x1

On-Chip Frame Buffer Size

DVMT Mode

DVMT/FIXED Memory Size

Item Help

Menu Level

By SPD

Auto

Enabled

Disabled

Press Enter

Auto

Disabled

8MB

DUMT

128MB

↑↓→←: Move Enter: Select F1: General Help+/-/PU/PD: Value F10: Save ESC: Exit

F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults

The settings on the screen are for reference only. Your version may not be

identical to this one.

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DFI G5C630-DR Manuel d'utilisateur Page 68

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